2019

PIMP my Many-Core: Pipeline-Integrated Message Passing
Jörg Mische, Martin Frieb, Alexander Stegmeier, Theo Ungerer
International Conference on Embedded Computer Systems: Architectures, Modelling, and Simulation (IC-SAMOS), 2019

2018

Analysing Real-Time Behaviour of Collective Communication Patterns in MPI
Alexander Stegmeier, Martin Frieb, Jörg Mische, Theo Ungerer
26th International Conference on Real-Time Networks and Systems, 2018, Chasseneuil-du-Poitou, France

Lightweight Hardware Synchronization for Avoiding Buffer Overflows in Network-on-Chips
Martin Frieb, Alexander Stegmeier, Jörg Mische, Theo Ungerer
17th International Conference on Architecture of Computing Systems (ARCS), 2018, Braunschweig, Germany

2017

Minimally Buffered Deflection Routing with In-order Delivery in a Torus
Jörg Mische, Christian Mellwig, Alexander Stegmeier, Martin Frieb, Theo Ungerer
11th International Symposium on Networks-on-Chip (NOCS), 2017, Seoul, Republic of Korea

Downloads:  mische2017minimally

Reduced Complexity Many-Core: Timing Predictability Due to Message-Passing
Jörg Mische, Martin Frieb, Alexander Stegmeier, Theo Ungerer
16th International Conference on Architecture of Computing Systems, 2017, Vienna, Austria

Downloads:  mische2017reduced

2016

WCTT bounds for MPI Primitives in the PaterNoster NoC
Alexander Stegmeier, Martin Frieb, Jörg Mische, Theo Ungerer
14th International Workshop on Real-Time Networks, 2016, Toulouse, France

Downloads:  2016_rtn_ste

Employing MPI Collectives for Timing Analysis on Embedded Multi-Cores
Martin Frieb, Alexander Stegmeier, Jörg Mische, Theo Ungerer
16th International Workshop on Worst-Case Execution Time Analysis, 2016, Toulouse, France

Downloads:  wcet2016_frieb

2014

Guaranteed Service Independent of the Task Placement in NoCs with Torus Topology
Jörg Mische and Theo Ungerer
Proceedings of the 22nd International Conference on Real-Time Networks and Systems (RTNS)

Publisher: ACM
DOI:  10.1145/2659787.2659804

Distributed Memory on Chip – Bringing Together Low Power and Real-Time
Jörg Mische, Stefan Metzlaff, and Theo Ungerer
Proceedings of the Workshop on Reconciling Performance and Predictability (RePP)

Downloads:  repp2014_mische

2012

Low power flitwise routing in an unidirectional torus with minimal buffering
Jörg Mische, Theo Ungerer
Proceedings of the 5th International Workshop on Network on Chip Architectures (NoCArc), pp. 63–68

2011

A Real-Time Capable Many-Core Model
Stefan Metzlaff, Jörg Mische, Theo Ungerer
Proceedings of 32nd IEEE Real-Time Systems Symposium: Work-in-Progress Session

Downloads:  Paper as PDF

Links:  RTSS 2011: Work-in-Progress Session,  RTSS 2011: Work-in-Progress Session: Download Proceedings