Chair Project Timing and Control-Flow Checker

• Start date: 01.01.2010
• End date: 21.12.2012
• Funded by: Universität Augsburg
• Local head of project: Prof. Dr. Theo Ungerer

Abstract

Robustness and reliability are essential requirements of today's embedded systems. Especially errors in the control flow of a program, e.g. caused by transient errors, may lead to a faulty system behavior potentially with catastrophic consequences. Several proposed methods for control flow checking only focus on a correct sequence of application parts but not on the correct timing behavior of the control flow, which is essential for hard real-time systems.

Julian Wolf investigated a new approach which introduces fine-grained on-line timing checks for hard real-time systems combined with a lightweight control flow monitoring technique. The proposed approach is a hybrid hardware-software technique: We instrument the application code at compile-time by adding check points, which contain temporal and logical information concerning the control flow. During runtime, a small hardware check unit connected to the core reads the instrumented data in order to verify the correctness of the application's control flow and timing behavior.

To evaluate the behavior of our technique, we implemented a tool for code instrumentation and a hardware check unit as an extension to the SystemC CarCore simulator. Moreover, we integrated a fault injection unit into the simulator, which is able to generate and analyze transient faults systematically.

Publications

2013

• An Optimized Timing and Control Flow Checker for Hard Real-Time Systems
  Julian Wolf and Theo Ungerer
  Proceedings of the 9th Workshop on Dependability and Fault Tolerance (VERFE), Prague, Czech Republic

2012

• Fault Detection Capabilities of an Enhanced Timing and Control Flow Checker for Hard Real-Time Systems
  Julian Wolf, Bernhard Fechner, and Theo Ungerer
  Proceeding of the 4th International Conference on Advances in System Testing and Validation Lifecycle (VALID '12), Lisbon, Portugal, p. 57-62

• Fault Coverage of a Timing and Control Flow Checker for Hard Real-Time Systems
  Julian Wolf, Bernhard Fechner, and Theo Ungerer
  Proceeding of the 18th IEEE International On-Line Testing Symposium (IOLTS '12), Sitges, Spain, p. 161-163

• Fine-Grained Timing and Control Flow Error Checking for Hard Real-Time Task Execution
  Julian Wolf, Bernhard Fechner, Sascha Uhrig, and Theo Ungerer
  Proceeding of the 7th IEEE International Symposium on Industrial Embedded Systems (SIES '12), Karlsruhe, Germany, p. 257-266