Dr.-Ing. Florian Haas

Wiss. Angestellter
Lehrstuhl für Embedded Systems
Telefon: +49 821 598 - 2393
Fax: +49 821 598 - 2359
E-Mail:
Raum: 3032 (N)
Adresse: Universitätsstraße 6a, 86159 Augsburg

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Publikationen

2022 | 2020 | 2019 | 2018 | 2017 | 2016 | 2014 | 2013

2022

Rico Amslinger, Christian Piatka, Florian Haas, Sebastian Weis, Theo Ungerer and Sebastian Altmeyer. 2022. Multiversioning hardware transactional memory for fail-operational multithreaded applications.
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2020

Rico Amslinger, Christian Piatka, Florian Haas, Sebastian Weis, Theo Ungerer and Sebastian Altmeyer. 2020. Hardware multiversioning for fail-operational multithreaded applications. DOI: 10.1109/sbac-pad49847.2020.00014
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Christian Piatka, Rico Amslinger, Florian Haas, Sebastian Weis, Sebastian Altmeyer and Theo Ungerer. 2020. Investigating transactional memory for high performance embedded systems. DOI: 10.1007/978-3-030-52794-5_8
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Architecture of Computing Systems – ARCS 2020: 33rd International Conference, Aachen, Germany, May 25–28, 2020, Proceedings

2019

Christoph Kühbacher, Christian Mellwig, Florian Haas and Theo Ungerer. 2019. A functional programming model for embedded dataflow applications. DOI: 10.1109/compsac.2019.10281
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Florian Haas. 2019. Fault-tolerant Execution of Parallel Applications on x86 Multi-core Processors with Hardware Transactional Memory.
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2018

Rico Amslinger, Sebastian Weis, Christian Piatka, Florian Haas and Theo Ungerer. 2018. Redundant execution on heterogeneous multi-cores utilizing transactional memory. DOI: 10.1007/978-3-319-77610-1_12
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Architecture of Computing Systems – ARCS 2018: 31st International Conference, Braunschweig, Germany, April 9–12, 2018, Proceedings, edited by Mladen Berekovic, Rainer Buchty, Heiko Hamann, Dirk Koch, Thilo Pionteck

2017

Florian Haas, Sebastian Weis, Theo Ungerer, Gilles Pokam and Youfeng Wu. 2017. Fault-tolerant execution on COTS multi-core processors with hardware transactional memory support. DOI: 10.1007/978-3-319-54999-6_2
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Architecture of Computing Systems - ARCS 2017: 30th International Conference, Vienna, Austria, April 3–6, 2017, Proceedings. Editors: Jens Knoop, Wolfgang Karl, Martin Schulz, Koji Inoue, Thilo Pionteck

2016

Florian Haas, Sebastian Weis, Theo Ungerer, Gilles Pokam and Youfeng Wu. 2016. POSTER: fault-tolerant execution on COTS multi-core processors with hardware transactional memory support. DOI: 10.1145/2967938.2974051
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2014

Florian Kluge, Mike Gerdes, Florian Haas and Theo Ungerer. 2014. A generic timing model for cyber-physical systems. DOI: 10.13140/2.1.1820.4165
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Florian Haas, Stefan Metzlaff, Sebastian Weis and Theo Ungerer. 2014. Enhancing real-time behaviour of parallel applications using Intel TSX.
BibTeX | RIS | URL

Florian Haas, Sebastian Weis, Stefan Metzlaff and Theo Ungerer. 2014. Exploiting Intel TSX for fault-tolerant execution in safety-critical systems. DOI: 10.1109/dft.2014.6962083
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2013

Florian Kluge, Florian Haas, Mike Gerdes and Theo Ungerer. 2013. History-cognisant time-utility-functions for scheduling overloaded real-time control systems. DOI: 10.13140/2.1.1080.0648
BibTeX | RIS | DOI | URL

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